This standard defines a defect coverage accounting method based on simulation models for defects observed within integrated circuits (ICs). The portion of all possible defects that are detected, or "covered", by tests of analog and mixed-signal circuits depends, in practice, on many factors (detectability, defect characteristics, detection threshold margin, measurement resolution, operating point, test patterns, etc.), which this standard considers as it defines how to report coverage. This standard focuses on defects in analog functions. In this context, "defect" is an observable unintended physical change in a circuit, and an "analog function" means a function that has input, internal, or output signals with meaningful values in a defined continuous range, and the function has at least one parametric performance that is sufficiently non-deterministic that its test has upper and/or lower limits (the limits may be real numbers or quantized digital equivalents). This standard considers redundancy, since most analog circuits have redundancy and defect tolerance, intentional or not. This standard does not consider combinations of variations that could result in a circuit failing to meet all its specifications - that is the subject of Monte Carlo simulations during design for yield and multi-parameter analog defect modeling. The defects considered here are applicable to purely digital circuits too, though typically a simplified fault model (stuck-at, for instance) is utilized for digital functions. Thus, this standard assumes the topic of stuck-at fault coverage accounting is addressed for digital circuits by IEEE1804 "Standard for Fault Accounting and Coverage Reporting to Digital Modules."